The use of switching regulators to control a DC output voltage at a level higher than, lower than, or the same as, an input voltage is well known. Typically, one or more switches are activated to supply current pulses via an inductor to charge an output capacitor. The output voltage level is maintained at a desired level by adjusting the on and off times of the switching pulses in accordance with output voltage and load conditions.
A conventional step-up, or boost, DC/DC converter is illustrated in FIG. 1. Inductor 10 and diode 12 are connected in series between input (VIN) and output (VOUT) nodes. The input node is typically connected to a DC source, the controlled output node coupled to a load. Capacitor 14 is connected between the output node and ground. Signal responsive switch 16 and resistor 18 are connected in series between the inductor/diode junction and ground. The switch is represented by a transistor having a base connected to the output of latch 20 through switch driver circuit 22. A set terminal of the latch is connected to the output of AND gate 24. Delay circuit 26 has an input connected to the reset output of the latch and an output connected to a first input of the AND gate. A second input of the AND gate is connected to the output of comparator 28. A first input of the comparator receives a feedback signal related to an output parameter. The output parameter may be the voltage at the output, the feedback signal derived through a feedback circuit 30, the feedback appropriately scaled for comparison with a reference voltage REF1 32 applied to a second input of the comparator. The reset terminal of the latch 20 is connected to the output of a second comparator 34. A first input of comparator 34 is connected to the junction between switch 16 and resistor 18. A second input of comparator 34 is connected to reference voltage circuit 36.
In operation, when switch 16 is in the on, or closed, state, current flows from source VIN through inductor 10 and resistor 18 to ground. Resistor 18 is a sensing element that provides an indication of the current level through the switch when the switch is closed. When the current through the switch increases to the threshold level of reference voltage REF2 36, comparator 34 outputs a signal to reset the latch 20, thereby turning off switch 16. When the switch is turned off, energy stored in the inductor is transferred to the capacitor 14. Delay circuit 26 ensures that the high latch reset output signal is not applied to the input of AND gate 24 until a minimum time interval has occurred. Turn-on of switch 16 is thus delayed accordingly. Thereafter, the switch will again be turned on when the feedback level exceeds the reference input to comparator 28.
In the particular conventional circuit illustrated, commonly known as a boost regulator, regulated voltage output VOUT has a voltage level higher in magnitude than the voltage input VIN and of the same polarity. Known converters, for example, are Linear Technology LT3463 and LT3464 converters. With appropriate arrangement of inductor, switch and capacitive elements, a regulator output voltage can be provided with a polarity opposite to that of the input voltage or in a buck regulator configuration in which voltage output VOUT has a voltage level lower in magnitude than the voltage input VIN.
In many portable systems, when the output load is light, the switching regulators are controlled to go into a power saving sleep mode. In the sleep mode, the regulator reduces the operating current by turning off some internal circuitry and operates intermittently in a burst mode. In a traditional “burst” mode scheme, a hysteretic comparator is used to monitor when the output voltage falls out of regulation in the sleep mode condition. Circuitry is then enabled to deliver the burst current pulses until the output voltage is brought back to within regulation level. Internal circuitry is again turned off in the sleep mode to save power consumption. With light output load, the output voltage then drifts lower to the programmed level at which the regulator “wakes up” to drive the output higher in burst cycles.
Inductor current and output voltage waveforms for typical burst/sleep mode operation are illustrated in FIG. 2. At time t0, the output voltage has fallen to a low regulation threshold voltage and a burst cycle has been initiated. The switched current pulses are applied to the output capacitor 14, building up the output voltage until a high regulation threshold voltage is attained at time t1. Switching is then terminated until the output voltage again falls to the low threshold at time t2. Operation continues in this manner during light load conditions. The regulator can wait a relatively long period of time before delivering pulses of energy. While waiting, the regulator enters into a state of low quiescent current and no switching activity, whereby energy is conserved.
The intermittent bursts in the switching waveforms can contain a low frequency content that forms noise in the audio band. A switching regulator operating in burst mode can readily produce switching frequencies below 40 kHz. The audio switching frequency can cause a ceramic capacitor to emit audio waves, which are undesirable to the end user of a system. A prior approach to this problem is the use of a constant frequency, pulse width modulated regulator in which an internal fixed frequency oscillator gates the power switch on each cycle. Such control effects low noise in the audio frequency range. However, the efficiency at light load is poor as the switching frequency remains high during light load conditions.
A need thus exists for a switching regulator that operates at high efficiency over a wide load range, including light load conditions, without having the disadvantage of producing unwanted noise.